Any experience with upgrading the Coreboot SPI firmware on x230?
Attempted upgrade to most recent coreboot, but the flash didn’t work, bricked the SPI chip.
using raspberry pi and flashprog on with pomona clip.
Looking for coreboot support and appropriate ROM file for SPI flash for EON chip.
unsure which flashprog command to use for read/writes and backing up the SPI chip.
Using Pi GPIO interface to flash.
Having posts like this:
# coreboot-x230
pre-built [coreboot](https://www.coreboot.org/) images and documentation on
how to flash them for the [Thinkpad X230](https://pcsupport.lenovo.com/en/products/laptops-and-netbooks/thinkpad-x-series-laptops/thinkpad-x230)
These images
* include [SeaBIOS](https://seabios.org/SeaBIOS) as coreboot payload, for maximum compatibility.
* are meant to be [flashed externally](#how-to-flash) (...top.rom release files)
* ...full.rom release files are not functional entirely. Only the the top 4M are usable.
* are compatible with Windows and Linux
## Latest build (config overview and version info)
See our [releases](https://github.com/merge/coreboot-x230/releases)
* Lenovo's proprietary VGA BIOS ROM is executed in "secure" mode
### coreboot
* We simply take coreboot's current state in it's master branch at the time we build a release image.
That's the preferred way to use coreboot. The git revision we use is always included in the release.
### Intel microcode
show original
https://www.surosec.com/posts/coreboot-x230-ime-disable.html
Using rasp pi 5 model B Rev 1.0
Trying to fix a bricked SPI on x230 basically.
Using also these guides:
https://app.circleci.com/pipelines/github/linuxboot/heads/998/workflows/cb76cb16-c555-4006-bcf1-e53207de9495/jobs/26411
A minimal Linux that runs as a coreboot or LinuxBoot ROM payload to provide a secure, flexible boot environment for laptops, workstations and servers.
https://www.surosec.com/posts/coreboot-x230-ime-disable.html
https://app.circleci.com/pipelines/github/linuxboot/heads/998/workflows/cb76cb16-c555-4006-bcf1-e53207de9495/jobs/26411
If the SPI itself is bricked/broken your only option that I know of is to resolder a new one or replace the motherboard, if the former isn’t an option. It’s much more likely that the file was corrupted or similar, in which case you just need to externally flash again. The linuxboot repo isn’t stable. You should use Nitrokey’s repo instead if you’re not familiar with the codebase.
How to determine if the SPI is actually bricked or not?
When you try to flash, it’s not recognized (and you’re sure you attached the clip properly with full pin contact), or part of the flashing process (like reading, writing, or verifying) fails reliably.
You should try to use a Nitrokey-compiled rom first, to establish whether the problem is with your file or your hardware.
Haven’t actually been able to read the SPI since it was incorrectly flashed; don’t know if it’s bricked or not.
Don’t know if Pi 5 is correctly wired to Pomona clip
When attempting to clip on the pomona clip, the Pi5 crashes.
Can check the Pi5 logs for source of crash? Why would an SPI chip
with attached Pomona clip cause an immediate crash like that?
That sounds like more of a problem with the flasher (Pi5) than the SPI. To be clear, I have never seen a SPI chip bricked that wasn’t mistreated, like given wrong voltage or something. It’s highly unlikely that this is your case.
That being said, I can’t help too much with the Pi. I don’t use them and am not familiar with resources for troubleshooting them. They are very popular, and I do know some people use them for flashing, so it shouldn’t be too hard for you to do.
Clip was positioned the wrong way; It doesn’t crash now. Tried ch341a previously, that could be a potential voltage issue.
unsure of which flashprog or flashrom command to use to see is SPI is dead.
Just use it normally and see if it works now that it’s on correctly. The ch341a in theory should only cause trouble if you do a lot of flashing with it. It could be one of those things where it’s just rare it oneshots something, but IIRC it’s more like damage-over-time.
which flasprog interface to use on Pi5 so many option for programmer interface.
linux_spi or linux_gpio_spi
try flashprog - p linux_gpio_spi:dev=/dev/spidev0.0
"Invalid or missing required programmer parameter cs=
"Unhandled programmer parameters (possibly due to another failure:
dev=/dev/spidev0.0
Error: Programmer initialization failed.
Pomona SPI Wires
Asking for CS value in flashrom?
flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=128
This command returns:
linux_spi_init: failed to open /dev/spidev0.0: Permission denied
sudo flashprog -p linux_spi:dev=/dev/spidev0.0,spispeed=128
"Found Micron/Numonyx/ST flash chip “N25Q064…” (8192 kB, SPI) on linux_spi
The SPI interface on the GPIO needs to be initialized and can verify with
lsmod | grep spi
The issue is, with the Pi5, the traditional raspi-config method doesn’t have an
“interfaces” option in the UI, so had to use different method
for GPIO SPI initialization.
ALSO:
spispeed=128 (this parameter MUST be included in the command)
ALSO:
sudo must be used
From the outpust of this, I can see the SPI chip is NOT bricked because it
returns output from the flashprog command (it reads successfully).
spispeed value is in Hz? The parameter range is not clear in the manpage.
shantyspruce:
I can’t help too much with the Pi. I don’t use them and am not familiar with resources for troubleshooting them. They are very popular, and I do know some people use them for flashing, so it shouldn’t be too hard for you to do.
I use a ch341a. (They can be modified or bought on a configuration safe for flashing and are much simpler to use…)
This is a clever idea; having preconfigured SPI and other chip programmers.
It saves a lot of time from fixing error messages and issues like voltage
mistmatch.
The basis for the spispeed option was here:
# coreboot-x230
pre-built [coreboot](https://www.coreboot.org/) images and documentation on
how to flash them for the [Thinkpad X230](https://pcsupport.lenovo.com/en/products/laptops-and-netbooks/thinkpad-x-series-laptops/thinkpad-x230)
These images
* include [SeaBIOS](https://seabios.org/SeaBIOS) as coreboot payload, for maximum compatibility.
* are meant to be [flashed externally](#how-to-flash) (...top.rom release files)
* ...full.rom release files are not functional entirely. Only the the top 4M are usable.
* are compatible with Windows and Linux
## Latest build (config overview and version info)
See our [releases](https://github.com/merge/coreboot-x230/releases)
* Lenovo's proprietary VGA BIOS ROM is executed in "secure" mode
### coreboot
* We simply take coreboot's current state in it's master branch at the time we build a release image.
That's the preferred way to use coreboot. The git revision we use is always included in the release.
### Intel microcode
show original
Pre-configured boards are like linux distros or overlays, saves time.
→ Depedencies installed, documentation already prepared, voltage matched,
pre-wired to clip and board, diagrams prepared, interfaces already enabled in
OS.
SO many undocumented steps in doing this correctly and using the
flashrom/flashprog commands correctly.
This problem took months to fix, turns out the secret is the spispeed parameter
was missing.
This problem took months to fix, turns out the secret is the spispeed parameter
was missing in the flashprog command. You need to set the spispeed
option to 128 …Hz? (Measured in Hz).
1 Like
4 MB is not responsive (she’s dead, Jim). Anybody know where to get
a Micron/Numonyx/ST N25Q032…1E, N25Q032…3E 4M
SPI chip?
Don’t want to get new board, will solder in a replacement.
Need to source an SPI chip.
It would be helpful if Pre-programmed, socketed SPI chips existed.
Then you could just swap it out instead of flashing it (and potentially
messing up the flash).
good job,