kzlz
November 10, 2026, 7:30am
1
Does the TPM GPIO reset vulnerability described in Heads Issue #2256 also affect Qubes OS certified hardware.
Should affected hardware still be considered secure for TPM-based security features?
here is the vulnerability
オープン 01:19PM - 09 Nov 26 UTC
enhancement / improvement
wontfix
security
documentation
not planned
upstream
SMM
See and interact under https://github.com/tlaurion/tpm-gpio-fail/issues/12 NOT H… ERE.
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**This vulnerability is HW design flaw CONFIRMED on Intel with dTPM being electrically muxed through shared GPIO with what Intel named "Primary to Sideband Bridge" (P2SB) on Skylake+**
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Proven vulnerable (no false negative)
- nv4x_adl
- x280
most probable false negatives:
- t480 (should be vulnerable just like x280)
- Meteor lake and other Intel Skylake+ platforms
Other architectures to be evaluated and to be proven respecting TCG guidance that electrical motherboard reset of TPM also resets whole platform.
- ARM ODM hw design guidance to ben confirmed not vulnerable
- AMD ODM hw design guidance to be confirmed not vulnerable
Chromebooks **thought** not vulnerable
- Don't have dTPM per se, but a security chip (openTitan) wired differently (no P2SB?) for their CR50/Ti50, which implements TPM2 capabilities Heads can use.
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Relevant threads/pages:
- Media attention attempted to be raised under https://github.com/binarly-io/SupplyChainAttacks/issues/7
- original issue raised: https://mkukri.xyz/2024/06/01/tpm-gpio-fail.html
- original tool to test Skylake+ https://github.com/kukrimate/tpm-gpio-fail
- my fork, attempting to add newer PCH to only realize that each board needs testing and quirks: https://github.com/tlaurion/tpm-gpio-fail/
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Pinning issue.
4 Likes
It does for at least one Qubes-certified model, the NovaCustom NV41 series:
Insurgo:
This vulnerability is HW design flaw CONFIRMED on Intel with dTPM being electrically muxed through shared GPIO with what Intel named “Primary to Sideband Bridge” (P2SB) on Skylake+
Proven vulnerable (no false negative)
NovaCustom V540TU currently has limited testing:
opened 07:16AM - 07 Aug 26 UTC
### System information
- Platform: NovaCustom V540TU (v54x_mtl_igpu)
- Firmware… : Dasharo v0.9.1 (coreboot+Heads)
### Results
```
=== DETECT ===
Found platform MeteorLake with PCH MTL PCH-U!
Platform MeteorLake is NOT vulnerable by design.
=== RESULT: platform not vulnerable by design ===
=== ASSERT ===
SBREG_BAR = 0xfd000000 (MEM)
Found Meteor Lake PCH - NOT VULNERABLE to PLTRST# assertion
Platform is NOT VULNERABLE to TPM GPIO reset attack.
GPIO pad lock is functional on this PCH -- assertion skipped.
=== RESULT: not vulnerable (assertion skipped) ===
Report results: https://github.com/tlaurion/tpm-gpio-fail/issues
Include this log output.
```
Even if the code was modified to not skip assertion on MTL, the PCRs were not cleared after running tpm-gpio-assert.
The rest are not Qubes-certified models (Lenovo ThinkPad X280 and T480).
2 Likes
Tonux
November 10, 2026, 10:48am
3
The concern is that the testing utility was giving false negatives and that any Intel Skylake+ platforms are vulnerable due to Intel’s incorrect implementation and physical wiring of the TPM (when the TPM is reset, the whole CPU should reset, resetting the machine, it does not).
More info: TPM GPIO FAIL and supply chain issues, lack of CVE and accountability by IBV->ODM->OEM · Issue #7 · binarly-io/SupplyChainAttacks · GitHub
So, if correct, (almost?) all Qubes Certified boards using an discrete TPM and Intel CPU are vulnerable.
2 Likes