The Future: RISC vs CISC cpus security & Qubes

Well… Like the subject says…
Xen works on Ampere Altra Max… (ok, with some “few” limitations).

As far as i can understand the problem is x86 VT-d tech. Is it so hard to implement it in RISC architecture?

Would it even be feasibile for Qubes OS team to start on developement on Ampere Altra Max?

TIA,
M.

PS: Please i don’t need AI answers, but human experience and prediction?

I’m talking about VT-d tech compared with Altra Max cpus/motherboards…

I thought you were asking about RISC.

Yeah. Ampere Altra is … what? RISC or CISC?

It was a rethorical question.

Can we get back to to subject?