--- coreboot-4.13/src/cpu/intel/model_206ax/model_206ax_init.c.orig 2020-11-20 06:01:35.000000000 -0600
+++ coreboot-4.13/src/cpu/intel/model_206ax/model_206ax_init.c 2022-12-29 07:00:25.666000000 -0600
@@ -4,6 +4,7 @@
#include <device/device.h>
#include <acpi/acpi.h>
#include <arch/cpu.h>
+#include <bootmode.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
@@ -174,14 +175,17 @@
*/
void set_power_limits(u8 power_limit_1_time)
{
+ // used to detect the processor model and set model-specific clock profile
+ char processor_name[49];
+
msr_t msr = rdmsr(MSR_PLATFORM_INFO);
- msr_t limit;
+ msr_t limit, turbo_ratio_limit;
unsigned int power_unit;
unsigned int tdp, min_power, max_power, max_time;
u8 power_limit_1_val;
if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr))
- return;
+ power_limit_1_time = ARRAY_SIZE(power_limit_time_sec_to_msr) - 1;
if (!(msr.lo & PLATFORM_INFO_SET_TDP))
return;
@@ -208,21 +212,31 @@
if (max_power > 0 && tdp > max_power)
tdp = max_power;
- power_limit_1_val = power_limit_time_sec_to_msr[power_limit_1_time];
+ // Vlad-overclock: hardcode PL1 time to 28 sec
+ printk(BIOS_DEBUG,
+ "Vlad-overclock: %s : %s() at line %d: %s%s%s\n",
+ __FILE__, __func__, __LINE__, CONFIG_LOCALVERSION,
+ (acpi_is_wakeup_s3() ? ", acpi_is_wakeup_s3" : ""),
+ (platform_is_resuming() ? ", platform_is_resuming" : ""));
+ //power_limit_1_val = power_limit_time_sec_to_msr[power_limit_1_time];
+ power_limit_1_val = power_limit_time_sec_to_msr[28];
/* Set long term power limit to TDP */
- limit.lo = 0;
+/* limit.lo = 0;
limit.lo |= tdp & PKG_POWER_LIMIT_MASK;
limit.lo |= PKG_POWER_LIMIT_EN;
limit.lo |= (power_limit_1_val & PKG_POWER_LIMIT_TIME_MASK) <<
PKG_POWER_LIMIT_TIME_SHIFT;
-
+*/
/* Set short term power limit to 1.25 * TDP */
- limit.hi = 0;
+/* limit.hi = 0;
limit.hi |= ((tdp * 125) / 100) & PKG_POWER_LIMIT_MASK;
- limit.hi |= PKG_POWER_LIMIT_EN;
+ limit.hi |= PKG_POWER_LIMIT_EN;*/
/* Power limit 2 time is only programmable on SNB EP/EX */
+ // Vlad-overclock: hardcode TDP 56W_68W
+ limit.lo = 0x00dc81c0;
+ limit.hi = 0x00008220;
wrmsr(MSR_PKG_POWER_LIMIT, limit);
/* Use nominal TDP values for CPUs with configurable TDP */
@@ -232,6 +246,31 @@
limit.lo = msr.lo & 0xff;
wrmsr(MSR_TURBO_ACTIVATION_RATIO, limit);
}
+
+ // Vlad-overclock: hardcode turbo ratio limit
+
+ turbo_ratio_limit.lo = 0;
+ fill_processor_name(processor_name);
+ // W520 i7-3720QM limited unlocking (all bins +4)
+ // stock turbo ratio for i7-3720QM: 0x22222324
+ // turbo_ratio_limit.lo = 0x26262728;
+ if (strstr(processor_name, "i7-3720QM")) // W520: 40-41-41-41
+ turbo_ratio_limit.lo = 0x28292929;
+ else if (strstr(processor_name, "i7-3940XM")) // W530: 41-42-42-42
+ turbo_ratio_limit.lo = 0x292a2a2a;
+
+ if (turbo_ratio_limit.lo) {
+ turbo_ratio_limit.hi = 0;
+ wrmsr(MSR_TURBO_RATIO_LIMIT, turbo_ratio_limit);
+ printk(BIOS_INFO,
+ "Vlad-overclock: %s : %s() at line %d: hardcoded turbo ratio limit 0x %08X %08X (%02u-%02u-%02u-%02u)\n",
+ __FILE__, __func__, __LINE__,
+ turbo_ratio_limit.hi, turbo_ratio_limit.lo,
+ (turbo_ratio_limit.lo >> 24) & 0xFF,
+ (turbo_ratio_limit.lo >> 16) & 0xFF,
+ (turbo_ratio_limit.lo >> 8) & 0xFF,
+ turbo_ratio_limit.lo & 0xFF);
+ }
}
static void configure_c_states(void)
@@ -309,12 +348,22 @@
conf = lapic->chip_info;
/* Set TCC activation offset if supported */
+ // Vlad-overclock: hardcode TCC 90 = 105 - 15
+ conf->tcc_offset = 15;
msr = rdmsr(MSR_PLATFORM_INFO);
+
+ // Vlad-overclock TODO create a constant for Programmable TJ OFFSET in:
+ // cpu/intel/model_206ax/model_206ax.h
+ // cpu/intel/haswell/haswell.h
if ((msr.lo & (1 << 30)) && conf->tcc_offset) {
msr = rdmsr(MSR_TEMPERATURE_TARGET);
msr.lo &= ~(0xf << 24); /* Bits 27:24 */
msr.lo |= (conf->tcc_offset & 0xf) << 24;
wrmsr(MSR_TEMPERATURE_TARGET, msr);
+ printk(BIOS_INFO,
+ "Vlad-overclock: %s : %s() at line %d: set tcc_offset to %d\n",
+ __FILE__, __func__, __LINE__,
+ conf->tcc_offset);
}
}
@@ -430,6 +479,10 @@
/* Clear out pending MCEs */
configure_mca();
+ printk(BIOS_INFO,
+ "Vlad-overclock: %s at line %d: Started %s. Clearing out pending MCEs - this should only be done on a cold boot%s\n",
+ __FILE__, __LINE__, __func__,
+ (acpi_is_wakeup_s3() ? ". acpi_is_wakeup_s3" : ""));
/* Print infos */
model_206ax_report();
--- coreboot-4.13/src/northbridge/intel/sandybridge/northbridge.c.orig 2020-11-20 06:01:35.000000000 -0600
+++ coreboot-4.13/src/northbridge/intel/sandybridge/northbridge.c 2022-12-29 06:35:57.820000000 -0600
@@ -411,11 +411,21 @@
* CPUs with configurable TDP also need power limits set in MCHBAR.
* Use the same values from MSR_PKG_POWER_LIMIT.
*/
- if (cpu_config_tdp_levels()) {
+ // Vlad-overclock: we're setting it unconditionally anyway
+// if (cpu_config_tdp_levels()) {
msr_t msr = rdmsr(MSR_PKG_POWER_LIMIT);
MCHBAR32(MCH_PKG_POWER_LIMIT_LO) = msr.lo;
MCHBAR32(MCH_PKG_POWER_LIMIT_HI) = msr.hi;
- }
+
+ // Vlad-overclock: hardcoded
+ printk(BIOS_INFO,
+ "Vlad-overclock: %s : %s() at line %d: unconditionally copied from MSR_PKG_POWER_LIMIT "
+ "to MCHBAR MCH_PKG_POWER_LIMIT_LO/HI 0x%X 0x%X%s\n",
+ __FILE__, __func__, __LINE__,
+ MCH_PKG_POWER_LIMIT_LO,
+ MCH_PKG_POWER_LIMIT_HI,
+ (acpi_is_wakeup_s3() ? ". acpi_is_wakeup_s3" : ""));
+// }
/* Set here before graphics PM init */
MCHBAR32(PAVP_MSG) = 0x00100001;
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